• SleeplessCityLights@programming.dev
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    3 hours ago

    There is an unsolvable compute problem. The average PC on earth has multiple bit-flips a year from cosmic rays. The space hardened chips we use are 50nm and the chips used from inference are 4 to 6nm. 50nm is far more cosmic ray resistant than 6nm because of the transistor size. Are we supposed to think making H100s with a 65nm process is possible? The speed of light creates a die size limitation as well.

    • TauZero@mander.xyz
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      2 hours ago

      The way I see it is they are doing inference, not transfiring bank account balances. I’d be curious to see some actual experimental data, but I’d expect LLMs to skip past bit flips same way you shrug and move on from spelling errors. At worst you can do your critical calculation in triplicate on your 6nm nodes (with redo upon dissensus) and reduce your bit error from 4/year (or 4000/year or whatever have you in orbit) to (4/year)^3